UT-developed design method might lead to superprocessor
By Kirk Ladendorf
Wednesday, August 27, 2003
Scientists at the University of Texas are expected to announce today that they have developed a way to design processor chips that could have an effect on future generations of high-performance computers.
Researchers Doug Burger and Stephen Keckler say their new method of design will result in individual processors with the power of supercomputers, although machines incorporating the chips still are several years off.
Burger and Keckler are leading a team funded by an $11.1 million grant from the Defense Advanced Research Projects Agency to develop prototype processor chips and computers based on their designs.
They expect their design architecture, called TRIPS, for Tera-Op Reliable Intelligently Adaptive Processing System, will deliver more than 1 trillion operations per second of computing power by 2010.
With the help of IBM Corp., which is supporting the program, the UT researchers expect to have working prototype chips and computers in their laboratory by the end of 2005. The project is one of many collaborations between UT and IBM, which employs about 6,300 people in Austin.
Chuck Moore, a senior research fellow at UT and a former chief engineer for IBM's Power4 processor project, is working with the researchers on the prototype effort and in the effort to find commercial backers for the technology. Moore said much of the chip design work will be done by a team of 12 to 15 UT graduate students. IBM will turn that design into working prototypes.
Microprocessors are the crucial "brain chips" in computers that execute software instructions. Burger and Keckler devised a way to build processors that can automatically adapt to different kinds of computing tasks.
They call their approach "polymorphism" because different parts of the chip can be reconfigured to handle different computer functions as needed. That kind of flexible processor would enable computer designers to do without specialty chips now used in computers for functions such as graphics processing.
"This approach will establish a new performance curve for advanced microprocessors," Moore said.
The prototype will contain up to four processing cores and more than 250 million transistors. It will operate as fast as 500 megahertz. The plan is to show that a more complex chip running at 20 times that speed could be built by 2010.